The speed, power, and complexity of integrated circuits, such as microprocessor chips, random access memory (RAM) chips, application specific integrated circuit (ASIC) chips, and the like, have increased dramatically in the last twenty years. More recently, these increases have led to development of so-called system-on-a-chip (SoC) devices. A SoC device allows nearly all of the components of a complex system, such as a cell phone or a television receiver, to be integrated onto a single piece of silicon. This level of integration greatly reduces the size and power consumption of the system, while generally also reducing manufacturing costs.
A recent trend in SoC devices and other large-scale integrated circuits is towards the adoption of reconfigurable processing devices. A reconfigurable processor is typically implemented as a fixed data path coupled to a dynamically reconfigurable unit (RU). There is not yet, however, a widely adopted reference architecture for reconfigurable devices because of their relative novelty. Research in the field is quite active. Among the academic projects, a few notable architectures worthy of mention are GARP at Berkeley, Chimaera at Northwestern University, and Piperench at Carnegie Mellon. CARP is a coprocessor attached to a host processor to speed up loop implementations, extracted and mapped automatically from C code by its compiler. Chimaera is a tightly coupled reconfigurable functional unit in a conventional processor data path that implements custom instructions of up to nine (9) input operands. Piperench is an attached processor that implements entire stream-based media applications, implementing the concept of a virtual pipeline. Each of these proposals has a different organization, programming model and interface to the processor.
An important performance parameter of any reconfigurable processing device is the management of hardware resources of the processor. The management of a limited set of hardware resources involves the allocation of such resources to a set of requested configurations (requesters). A resource manager is usually added as a part of a data processing system to act as the interface between the resources and the requesters. The basic tasks performed by a resource manager are:
1) searching for the best fitting (or optimal) available set of resources to fulfill the request. This involves data structures (probably sorted) that must be maintained and that contain updated information about the status of the resources at every instant;
2) modifying such data structures to reflect changes in terms of new request allocations and terminations; and
3) executing actions that effectively allocate and setup the resources to the requester.
These operations often represent an overhead in the data processing system, because the managed resources are not available to perform useful work until the resource manager has completed the allocation tasks. Therefore, the time spent performing these steps should be minimized to provide the highest throughput and utilization of the system resources.
Therefore, there is a need in the art for improved reconfigurable processing devices. In particular, there is a need for an improved resource manager for use in a reconfigurable processing device.